SIRA72DP www.vishay.com vishay siliconix s17-0011-rev. a, 16-jan-17 1 document number: 76508 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 n-channel 40 v (d-s) mosfet features ? trenchfet ? gen iv power mosfet ? tuned for the lowest r ds -q oss fom ? 100 % r g and uis tested ?q gd /q gs ratio < 1 optimizes switching characteristics ? material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 applications ? synchronous rectification ? high power density dc/dc ? dc/ac inverters ? battery and load switch notes a. based on t c = 25 c. b. surface mounted on 1" x 1" fr4 board. c. t = 10 s. d. see solder profile ( www.vishay.com/doc?73257 ). the powerpak so-8 is a leadless package. the end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufactu ring. a solder fillet at the exposed copper tip cannot be guara nteed and is not required to ensure adequate bo ttom side solder interconnection. e. rework conditions: manual soldering with a solderin g iron is not recommended for leadless components. f. maximum under steady stat e conditions is 70 c/w. g. package limited. product summary v ds (v) 40 r ds(on) max. ( ? ) at v gs = 10 v 0.00350 r ds(on) max. ( ? ) at v gs = 4.5 v 0.00480 q g typ. (nc) 19.5 i d (a) 60 configuration single powerpak ? s o-8 s ingle top view 1 6.15 mm 5.15 mm bottom view 4 g 3 s 2 s 1 s d 8 d 6 d 7 d 5 n-channel mosfet g d s ordering information package powerpak so-8 lead (pb)-free and halo gen-free SIRA72DP-t1-ge3 absolute maximum ratings (t a = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds 40 v gate-source voltage v gs +20, -16 continuous drain current (t j = 150 c) t c = 25 c i d 60 g a t c = 70 c 60 a t a = 25 c 27.6 b, c t a = 70 c 21.8 b, c pulsed drain current (t = 100 s) i dm 150 continuous source-drain diode current t c = 25 c i s 25.1 t a = 25 c 4.3 b, c single pulse avalanche current l = 0.1 mh i as 20 single pulse avalanche energy e as 20 mj maximum power dissipation t c = 25 c p d 56.8 w t c = 70 c 36.3 t a = 25 c 4.8 b, c t a = 70 c 3 b, c operating junction and storage temperature range t j , t stg -55 to +150 c soldering recommendations (peak temperature) d, e 260 thermal resistance ratings parameter symbol typical maximum unit maximum junction-to-ambient b, f t ? 10 s r thja 22 26 c/w maximum junction-to-case (drain) steady state r thjc 1.8 2.2
SIRA72DP www.vishay.com vishay siliconix s17-0011-rev. a, 16-jan-17 2 document number: 76508 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. pulse test; pulse width ? 300 s, duty cycle ? 2 %. b. guaranteed by design, not su bject to production testing. stresses beyond those listed under absolute maximum ratings ma y cause permanent damage to th e device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those in dicated in the operational sectio ns of the specifications is not implied. exposure to absolute maximum rating conditions for extended pe riods may affect device reliability. specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 40 - - v v ds temperature coefficient ? v ds /t j i d = 250 a -25- mv/c v gs(th) temperature coefficient ? v gs(th) /t j --5.3- gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 1.1 - 2.4 v gate-source leakage i gss v ds = 0 v, v gs = +20, -16 v - - 100 na zero gate voltage drain current i dss v ds = 40 v, v gs = 0 v - - 1 a v ds = 40 v, v gs = 0 v, t j = 55 c - - 10 on-state drain current a i d(on) v ds ? 5 v, v gs = 10 v 30 - - a drain-source on-state resistance a r ds(on) v gs = 10 v, i d = 10 a - 0.00285 0.00350 ? v gs = 4.5 v, i d = 10 a - 0.00385 0.00480 forward transconductance a g fs v ds = 10 v, i d = 10 a - 76 - s dynamic b input capacitance c iss v ds = 20 v, v gs = 0 v, f = 1 mhz - 3240 - pf output capacitance c oss - 455 - reverse transfer capacitance c rss -60- c rss /c iss ratio - 0.026 0.052 total gate charge q g v ds = 20 v, v gs = 10 v, i d = 10 a - 41.5 63 nc v ds = 20 v, v gs = 4.5 v, i d = 10 a -19.530 gate-source charge q gs -8.7- gate-drain charge q gd -4.2- output charge q oss v ds = 20 v, v gs = 0 v - 18.5 28 gate resistance r g f = 1 mhz 0.5 1.4 2.5 ? turn-on delay time t d(on) v dd = 20 v, r l = 2 ? i d ? 10 a, v gen = 10 v, r g = 1 ? -1020 ns rise time t r -2040 turn-off delay time t d(off) -2448 fall time t f -714 turn-on delay time t d(on) v dd = 20 v, r l = 2 ? i d ? 10 a, v gen = 4.5 v, r g = 1 ? -2958 rise time t r -85170 turn-off delay time t d(off) -3060 fall time t f -3670 drain-source body diode characteristics continuous source-drain diode current i s t c = 25 c - - 25.1 a pulse diode forward current (t p = 100 s) i sm --150 body diode voltage v sd i s = 5 a - 0.74 1.1 v body diode reverse recovery time t rr i f = 10 a, di/dt = 100 a/s, t j = 25 c -3162ns body diode reverse recovery charge q rr -2346nc reverse recovery fall time t a -15- ns reverse recovery rise time t b -16-
SIRA72DP www.vishay.com vishay siliconix s17-0011-rev. a, 16-jan-17 3 document number: 76508 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) output characteristics on-resistance vs. drain current gate char g e transfer characteristics capacitance on-resistance vs. junction temperature 10 100 1000 10000 0 20 40 60 80 100 00.511.522.5 axis title 1st line 2nd line 2nd line i d - drain current (a) v ds - drain-to-source voltage (v) 2nd line v gs = 10 v thru 4 v v gs = 2 v v gs = 3 v 10 100 1000 10000 0.001 0.002 0.003 0.004 0.005 0 20406080100 axis title 1st line 2nd line 2nd line r ds(on) - on-resistance () i d - drain current (a) 2nd line v gs = 4.5 v v gs = 10 v 10 100 1000 10000 0 2 4 6 8 10 0 9 18 27 36 45 axis title 1st line 2nd line 2nd line v gs - gate-to-source voltage (v) q g - total gate charge (nc) 2nd line v ds = 30 v v ds = 20 v v ds = 10 v i d = 10 a 10 100 1000 10000 0 30 60 90 120 150 012345 axis title 1st line 2nd line 2nd line i d - drain current (a) v gs - gate-to-source voltage (v) 2nd line t c = 25 c t c =-55 c t c = 125 c 10 100 1000 10000 0 800 1600 2400 3200 4000 0 8 16 24 32 40 axis title 1st line 2nd line 2nd line c - capacitance (pf) v ds - drain-to-source voltage (v) 2nd line c rss c oss c iss 10 100 1000 10000 0.5 0.8 1.1 1.4 1.7 2.0 -50-25 0 255075100125150 axis title 1st line 2nd line 2nd line r ds(on) - on-resistance (normalized) t j - junction temperature (c) 2nd line i d = 10 a v gs = 10 v v gs = 4.5 v
SIRA72DP www.vishay.com vishay siliconix s17-0011-rev. a, 16-jan-17 4 document number: 76508 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) source-drain diode forward volta g e threshold volta g e on-resistance vs. gate-to-source volta g e sin g le pulse power, junction-to-ambient safe operatin g area 10 100 1000 10000 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1.0 1.2 axis title 1st line 2nd line 2nd line i s - source current (a) v sd - source-to-drain voltage (v) 2nd line t j = 150 c t j = 25 c 10 100 1000 10000 -1.0 -0.7 -0.4 -0.1 0.2 0.5 -50 -25 0 25 50 75 100 125 150 axis title 1st line 2nd line 2nd line v gs(th) - variance (v) t j - temperature (c) 2nd line i d = 5 ma i d = 250 a 10 100 1000 10000 0 0.003 0.006 0.009 0.012 0.015 0246810 axis title 1st line 2nd line 2nd line r ds(on) - on-resistance () v gs - gate-to-source voltage (v) 2nd line t j = 25 c t j = 125 c i d = 10 a 10 100 1000 10000 0 40 80 120 160 200 0.001 0.01 0.1 1 10 axis title 1st line 2nd line 2nd line power (w) time (s) 2nd line 10 100 1000 10000 0.01 0.1 1 10 100 1000 0.01 0.1 1 10 100 axis title 1st line 2nd line 2nd line i d - drain current (a) v ds - drain-to-source voltage (v) (1) v gs > minimum v gs at which r ds(on) is specified i dm limited limited by r ds(on) (1) t a = 25 c single pulse bvdss limited 100 ms 10 ms 1 ms 100 s 10 s dc 1s i d limited
SIRA72DP www.vishay.com vishay siliconix s17-0011-rev. a, 16-jan-17 5 document number: 76508 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) current deratin g a power, junction-to-case power, junction-to-ambient note a. the power dissipation p d is based on t j (max.) = 150 c, using junction-t o-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to determine the cu rrent rating, when this rating falls below the package limit. 10 100 1000 10000 0 22 44 66 88 110 0255075100125150 axis title 1st line 2nd line 2nd line i d - drain current (a) t c - case temperature (c) 2nd line package limited 10 100 1000 10000 0 14 28 42 56 70 0255075100125150 axis title 1st line 2nd line 2nd line power (w) t c - case temperature (c) 2nd line 10 100 1000 10000 0 0.5 1.0 1.5 2.0 2.5 0255075100125150 axis title 1st line 2nd line 2nd line power (w) t a - ambient temperature (c) 2nd line
SIRA72DP www.vishay.com vishay siliconix s17-0011-rev. a, 16-jan-17 6 document number: 76508 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) normalized thermal transient impedance, junction-to-ambient normalized thermal transient impedance, junction-to-case vishay siliconix maintains worldw ide manufacturing ca pability. products may be manufactured at one of several qualified locatio ns. reliability da ta for silicon technology and package reliability represent a composite of all qu alified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?76508 . 10 100 1000 10000 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 axis title 1st line 2nd line normalized effective transient thermal impedance square wave pulse duration (s) 2nd line 0.1 0.05 0.02 single pulse duty cycle = 0.5 0.2 p dm t 1 t 2 1. duty cycle, d = 2. per unit base = r thja = 70 c/w 3. t jm -t a = p dm z thja (t) 4. surface mounted t 1 t 2 notes: 10 100 1000 10000 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 axis title 1st line 2nd line normalized effective transient thermal impedance square wave pulse duration (s) 2nd line 0.1 0.05 0.02 single pulse duty cycle = 0.5 0.2
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